(a) Field of the Invention
The present invention relates to a UV nanoimprint lithography process and its apparatus, and more specifically, to a UV nanoimprint lithography process and its apparatus capable of repeatedly fabricating nanostructures on a substrate (e.g. wafer, glass, quartz, etc.) with a stamp having the nanostructures engraved thereon.
(b) Description of Related Art
The UV nanoimprint lithography technology is an economical and effective method of fabricating nanostructures. It is multidisciplinary, so that it should be supported by various technologies from such fields as nano-scale materials science, stamp fabrication, anti-adhesion layer, etching and measurements. The nano-scale precision control technology is regarded as a basis.
The UV nanoimprint lithography technology is applicable to ultra high-speed metal-oxide-semiconductor field-effect transistors (MOSFETs), metal-semiconductor field-effect transistors (MESFETs), high-density magnetic storage devices, high-density compact disks (CD), nano-scale metal-semiconductor-metal photodetectors (MSM PDs), and high-speed single-electron transistor memory, etc.
In the nanoimprint process, developed by Prof. Chou et al. at Princeton Univ. in 1996, a stamp having embossed structures fabricated by the electron beam lithography process is pressed at high temperature on the wafer coated with a polymethylmethacrylate (PMMA) resist, and is released when the resist is cooled. Thus, the resist is imprinted with the negative patterns of nanostructures of the stamp, and an anisotropic etching process is followed to open the etch window of the wafer. In 2001, a laser-assisted direct imprint (LADI) method, that uses a single 20-ns Excimer laser with a wavelength of 308-nm to instantaneously melt the surface of a silicon wafer or the resist coated on a silicon wafer. Similarly, in a nanosecond laser-assisted nanoimprint lithography (LA-NIL) applied to polymer, nanostructures with a line width of 100 nm and a depth of 90 nm are imprinted to polymer-based resist.
The aforementioned nanoimprint technologies are performed at high temperature. This makes them inapplicable to the implementation of semiconductor devices, a multi-layer process, because thermal deformation occurring in these technologies will hinder multi-layer alignment. Furthermore, high pressure (about 30 atmospheric pressures) required to imprint high-viscosity resist can break or damage previously fabricated nanostructures. Opaque stamps used in these processes are also an obstacle to the multi-layer alignment.
To address these problems, the step & flash imprint lithography (SFIL) process is suggested by Prof. Sreenivasan at the University of Texas at Austin in 1999. This process uses a UV-curable material to fabricate a nanostructure at low pressure and room temperature is characterized by the fact that UV-transparent materials such as quartz and Pyrex® glass are used for the stamp. In the SFIL process, a transfer layer is first spin-coated on a silicon wafer, and a low-viscosity UV-curable resin is filled into the nanostructures while maintaining a certain interval between the UV-transparent stamp and the transfer layer.
Subsequently, at the time of completion of the filling, the stamp is in contact with the transfer layer and the resin is cured by illuminating with UV light. Thereafter, the stamp is separated and the nanostructure is transferred on the wafer by the etching and the lift-off processes.
However, the gap distribution between the stamp and the wafer for use in the UV nanoimprint lithography process is not constant (e.g., Si wafer: 20˜30 μm), so that the resist may be insufficiently pressed by the stamp during imprinting. In the SFIL process using a small-area stamp, the distance between the stamp and the wafer is measured with distance sensors attached at the sides of the stamp before pressing the stamp is used, and, based on the measurements, the stamp is finely rotated to the stamp as parallel as possible to the wafer. In other words, in SFIL, imprinting is performed in such a way that the stamp with nanostructures is manipulated according to the waveness of the wafer surface.
The SFIL process is also characterized by the fact that the entire wafer is imprinted not at one time but repeatedly in several times because it uses a small-area stamp, smaller than the wafer in size. This is a sort of the step-and-repeat type imprinting. Since it uses a small-area stamp and the alignment and imprinting should be repeated, it will take a long time to finish imprinting of a large-area wafer.
Further, to imprint a large-area wafer in a short time, a large-area stamp on which nanostructures are fabricated can be used to press the resist deposited on the wafer. However, the larger the stamp and the wafer become, the more serious the error of flatness becomes. This means that some of the resist may be insufficiently pressed and some of the nano structures may be incompletely filled. In addition, the non-uniform residual layer thickness, which occurs because of the error of flatness, can make the etching process difficult or unsuccessful.